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SNUG Awards |
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1st Place - Best Paper
Boston | XA Verification in Implantable Medical Design
Author(s): Garrett Marshall, Jalpa Shah, Scott Stanslaski [Medtronic], Joseph Perttu [Synopsys]
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| | Israel | Robust Power Gating Implementation Using ICC
Author(s): Ariel Wolf [Intel]
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| | San Jose | SystemVerilog Assertions - Design Tricks and SVA Bind Files
Author(s): Clifford Cummings [Sunburst Design, Inc.]
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| India
AMS | SRAM Compilers Timing Analysis Using Active-Net Based HSIM-Star-RCXT Flow
Author(s): Gaurav Varshney, Dharin Shah, Parvinder Rana, Sateesh Chandramohan [Texas Instruments India Pvt Ltd]
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| | FPGA | Efficient Emulation Methodology of Multi-Million Gate SoCs Using Synopsys FPGA Tools
Author(s): Sabyasachi Dey, Praveen Goyal, Ankit Srivastava [Qualcomm India Pvt. Ltd.]
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| | Physical Design | A Comprehensive Flow for the Implementation of Large and Complex Multimedia Designs in 45nm and Beyond
Author(s): Sreeram Chandrasekar, Aishwarya Singh, Gowrysankar Shanmugam, Anup Rajput, Amitesh Khongal [Texas Instruments India]
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| | Sign-Off | An Approach to Hierarchical Multi-Voltage Noise Analysis Using PT-SI with Minimal Runtime-Accuracy Tradeoff
Author(s): Chakradhar Tallury, Vijay Kumar Budumuru, Vijaykishan Narayanan [AMD India Pvt Ltd]
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| | Synthesis | Fanout and Statistical Power Estimation based Minimal Scan Cell Gating for Low Test Power Consumption
Author(s): Vishwanath.S, Mohammed Ashfaq Shukoor, Srinivas Kumar Vooka, Srivaths Ravi [Texas Instruments India Pvt Ltd]
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| | Verification | Verifying Complex Low Power Integrated Graphics Chip: A Methodology Using MVSIM and MVRC
Author(s): Girish Kumar S, Alok Jain [Nvidia Graphics Pvt. Ltd], Sesha Sai Kumar C V, A. Krishna Theja [Synopsys, Inc.] | | |
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